Q. Describe the operation performed by the instruction OUT 47 h, AL.

Ans : It transfers the content of AL to I/O port 47h. Notice that I/O port number appears as 0047h on the 16 bit address bus and that data from AL appears on the data bus of the microprocessor.

Q. Pentium processor has a superscalar architecture’. Explain the meaning of the statement.

Ans: The Pentium microprocessor is organized with three execution units. One executes floating-point instructions, and the other two (U-pipe and V-pipe) execute integer instructions. This means that it is possible to execute three instructions simultaneously.

Q. Write a short note on RS-232-C.

Ans: The RS-232 standard is a collection of connection standards between different pieces of equipment. The EIA RS-232 serial communication standard is a universal standard, originally used to connect teletype terminals to modem devices. In a modern PC the RS-232 interface is referred to as a COM port. The COM port uses a 9-pin D-type connector (Refer Fig (a)) to attach to the RS-232 cable. The RS-232 standard defines a 25-pin D-type connector (Refer Fig (b)) but IBM reduced this connector to a 9-pin device so as to reduce cost and size.

Q. Explain the terms: simplex, half duplex and full duplex.

Ans: Simplex Transmission
Data in a simplex channel is always one way. Simplex channels are not often used because it is not possible to send back error or control signals to the transmit end. An example of a simplex channel in a computer system is the interface between the keyboard and the computer, in that key codes need only be sent one way from the keyboard to the computer system.
Half Duplex Transmission
A half duplex channel can send and receive, but not at the same time. It’s like a onelane bridge where two-way traffic must give way in order to cross. Only one end transmits at a time, the other end receives.
Full Duplex Transmission
Data can travel in both directions simultaneously. There is no need to switch from transmit to receive mode like in half duplex. It’s like a two lane bridge on a twolane highway.

Q. How DRAM’s are different from SRAM’s? Why DRAMs are said to employ address multiplexing?

Ans: Dynamic RAM (DRAM) is essentially the same as SRAM, except that it retains data for only 2 or 4 ms on an internal capacitor. After 2 or 4 ms, the contents of the DRAM must be completely rewritten (refreshed) because the capacitors, which store logic 1 or logic 0, lose their charges. The entire content of the memory is refreshed with 256 reads in a 2-to-4 ms interval. Refreshing also occurs during a write, a read or during a special refresh cycle.

Q. What do you mean by external and internal data bus? How are these two related in 8088 processor.

Ans: Internal Data Bus: A bus that operates only within the internal circuitry of the CPU, communicating among the internal caches of memory that are part of the CPU chip’s design. This bus is typically rather quick and is independent of the rest of the computer’s operations.
External Data Bus: A bus that connects a computer to peripheral devices. The 8088 microprocessor has 16-bit registers, 16-bit internal data bus and 20-bit address bus, which allows the processor address up to 1 MB of memory.

Q. What are program-invisible registers?

Ans: the global and local descriptor tables are found in the memory system. In order to access and specify the address of these tables, the program invisible registers used. The program invisible registers are not directly addressed by software so they are given name.
The GDTR (global descriptor table register) and IDTR (interrupt descriptor table register) contain the base addresses of the descriptor table and its limit. The limit of each descriptor table is 16 bits because the maximum table length is 64 Kbytes. When the protected mode operation is desired, the address of the global descriptor table and its limit are loaded into the GDTR.

Q. Write a brief note on MMX technology.

Ans: MMX (Multimedia extensions) technology adds 57 new instructions to the instruction set of the Pentium – 4 microprocessors. The MMX technology also introduces new general purpose instructions. The new MMX instructions are designed for application such as motion video, combined graphics with video, image processing, audio synthesis, speech synthesis and compression, telephony, video conferencing, 2D graphics, and 3D graphics. These new instructions operate in parallel with other operations as the instruction for the arithmetic coprocessor.
The MMX architecture introduces new packed data types. The data types are eight packed, consecutive 8-bit bytes; four packed, consecutive 16-bit words; and two packed, consecutive 32-bit double words.