Q.16  The addressing mode used in an instruction of the form ADD X Y, is
 (A) Absolute  (B) indirect
 (C) index     (D) none of these
 
 Ans: C
 
Q.17  If memory access takes 20 ns with cache and 110 ns with out it, then the ratio  
  ( cache uses a 10 ns memory) is
 (A) 93%  (B) 90%
 (C) 88%  (D) 87%
 Ans: B  
 
Q.18  In a memory-mapped I/O system, which of the following will not be there?
 (A) LDA  (B) IN
 (C) ADD  (D) OUT
 
Ans: A  
 
Q.19  In a vectored interrupt.
 (A) the branch address is assigned to a fixed location in memory.
 (B) the interrupting source supplies the branch information to the processor through an interrupt vector.
 (C) the branch address is obtained from a register in the processor
 (D) none of the above
 
 Ans: B
 
Q.20  Von Neumann architecture is
 (A) SISD  (B) SIMD
 (C) MIMD  (D) MISD
 
 Ans: A
 
Q. 21 The circuit used to store one bit of data is known as
 (A) Encoder    (B) OR gate
 (C) Flip Flop  (D) Decoder
 
 Ans: C  
 
Q.22  Cache memory acts between
 (A) CPU and RAM        (B) RAM and ROM
 (C) CPU and Hard Disk  (D) None of these
 
 Ans: A  
 
Q.23  Write Through technique is used in which memory for updating the data
 (A) Virtual memory    (B) Main memory
 (C) Auxiliary memory  (D) Cache memory
 
 Ans: D
 
Q.24  Generally Dynamic RAM is used as main memory in a computer system as it
 (A) Consumes less power     (B) has higher speed
 (C) has lower cell density  (D) needs refreshing circuitary
 
 Ans: B  
 
Q.25  In signed-magnitude binary division, if the dividend is (11100)_2  and divisor is (10011)_2 then the result is
_= Base
  (A) (00100)_2
  (B) (10100)_2
  (C) (11001)_2
  (D) (01100)_2
 
 Ans: B
 
Q.26  Virtual memory consists of
 (A) Static RAM       (B) Dynamic RAM
 (C) Magnetic memory  (D) None of these
 
 Ans: A
 
Q.27  In a program using subroutine call instruction, it is necessary
 (A) initialise program counter  
 (B) Clear the accumulator
 (C) Reset the microprocessor
 (D) Clear the instruction register
 
 Ans: D  
 
Q.28  A Stack-organised Computer uses instruction of
 (A) Indirect addressing  (B) Two-addressing
 (C) Zero addressing      (D) Index addressing
 
 Ans: C
 
Q.29  If the main memory is of 8K bytes and the cache memory is of 2K words.  It uses associative mapping.  Then each word of cache memory shall be
 (A) 11 bits  (B) 21 bits
 (C) 16 bits  (D) 20 bits
 
 Ans: C
 
Q.30  A-Flip Flop can be converted into T-Flip Flop by using additional logic circuit
_=Base
  (A) D = T.Q_n       (B)    D = T'  
  (C) D = T.Q_n       (D)    D = T Exclusive Or Q_n  
 
 Ans: D